Software Verification Lab

College of Computer Science and Technology
Nanjing University of Aeronautics and Astronautics
29 Jiangjun Avenue, 211106 Nanjing, Jiangsu, China PR

As computer and software systems become more pervasive, their dependability becomes increasingly important. The size and complexity of the software systems nowadays inevitably lead to errors during both design and implementation phases, which may result in failures and even unacceptable losses. The goal of our research at SVLab is to develop formal verification techniques that will help developers in identifying errors in software. Our recent focus has been on model checking, runtime verification, testing, and their applications to avionics software and network protocols.

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